1. Field of the Invention
The present invention relates to a Bi-MOS circuit and, more particularly, to a Bi-MOS circuit suitable for large-scale integrated circuits (hereinafter, referred to LSI's) such as gate arrays, memories and logic IC's.
2. Description of the Related Art
In order to improve LSI's with respect to a operation speed and an output power, many efforts have been made to combine bipolar transistors and metal-oxide-semiconductor field-effect transistors (MOSFET), as disclosed in "NEC Research and Development", No. 84, January (1987), pp. 127.about.130 and "VLSI DESIGN", August (1984), pp. 98.about.100.
However, as the demand for more integrated density has been increased, the composed elements must be miniaturized. If the miniaturized MOSFETs have a channel length shorter than 0.8 .mu.m, the hot carrier injection and the lowered withstand voltage between source and drain become new problems. Those problem may be overcome by lowering power voltage. The low power voltage decreases power dissipation to improve the integration density with the same total power consumption. The low power voltage, however, deteriorates high speed operation and driving ability.
In order to resolve the aforementioned problems, it has been proposed to add input and output signal level converting stages and applying a lowered power voltage to a signal processing part between the input and output signal level converting stages. The lowered power voltage was generated by incorporating a voltage converter formed in the same semiconductor chip. The signal processing part was formed of a combination of a large number of fundamental circuits, that is, for example, basic cells in a gate-array device. The fundamental circuit cells were formed of Bi-MOS circuits for high speed operation.
However, a large number of fundamental circuits were often operated simultaneously to cause a large quantity of transient currents. To supply such large quantity of transient current, the voltage converter must be designed by using large size transistors and requires an extremely large area to lower the integration density. Moreover, the voltage converter requires a coupling capacitor to avoid undesired oscillation. The capacitor, however, occupies a large area to further decrease the integrated density. Furthermore, the driving ability of the bipolar circuit was not improved by the lowered power voltage.